You're correct about it being possible for other CPUs to see "crossed" loads/stores, but within one CPU/stream of instructions the programmer-visible ordering is absolutely preserved, because if it wasn't, a lot of existing software would break. In your example, if ebx == esp, and both CPUs executed those two instructions, then they must both see eax == 1. I think you had this scenario in mind instead (where A and B are different memory locations):
CPU 1:
mov $1, (A)
mov (B), %eax
CPU 2:
mov $1, (B)
mov (A), %eax
Where eax == 0 on both CPUs is definitely possible.
The point to note is that the decision on whether or not the reordering can occur, based on whether or not A and B are the same or not, is made dynamically at the point of execution.
CPU 1:
CPU 2: Where eax == 0 on both CPUs is definitely possible.